1. Field of the Invention
The present invention relates to a wafer boat for holding a plurality of semiconductor wafers and for accommodating the same in a vertical thermal treatment furnace. It also relates to a film formation method.
2. Description of Related Art
In order to form a semiconductor integrated circuit, processes of forming a film on a semiconductor wafer then etching the thus-formed film in a predetermined circuit pattern are generally repeated a plurality of times. A batch-type vertical thermal treatment furnace is often used for this film formation process because it is capable of processing a large number of wafers, such as 50 to 150 wafers, at a time. To maintain the electrical characteristics of the completed semiconductor integrated circuits as products, the uniformity of each film over the entire wafer surface must be kept high.
With this type of semiconductor integrated circuit, a large number of components such as transistors, resistors, and capacitors are fabricated smaller and at higher levels of integration, and there have recently been requests for a further increase in miniaturization in such components to answer demands for even higher densities and higher levels of integration.
If capacitors are taken as an example, the surface area thereof decreases as the degree of integration increases, so that the capacitance thereof also decreases. This means that the thickness of the capacitative insulating film of the capacitor, which acts as the distance between the terminals thereof must be made thinner, or a capacitative insulating film with a high dielectric constant must be used, to compensate for the deficiency in surface area and guarantee a predetermined capacitance.
In the prior art, a two-layer structure such as one of silicon nitride (Si.sub.3 N.sub.4) and silicon oxide (SiO.sub.2) is used as the capacitative insulating film of such a capacitor, but the dielectric constant E of this type of capacitative insulating film is on the order of 3.8 to 4.0. If recent design rules for devices are considered, the thickness of the capacitative insulating film has reached a physical limit for ensuring the insulating capabilities, such as approximately 5 to 8 nm. This means that a capacitative insulating film with an even higher dielectric constant is required, to ensure a predetermined capacitance from a smaller surface area.
In these circumstances, tantalum oxide (Ta.sub.2 O.sub.5) film has recently attracted attention as a novel capacitative insulating film that satisfies the above requirements. The dielectric constant of this tantalum oxide film is extremely high, on the order of 27, which is seven times the dielectric constant of the above described two-layer capacitative insulating film, so that this material is attracting attention as a superior capacitative insulating film.
When this tantalum oxide film is used as a capacitative insulating film, the surface of a lower electrode, which is formed of polysilicon that has been doped with an impurity, is covered by a silicon nitride film that is created by rapid thermal nitridation (RTN) processing, and then the tantalum oxide film is formed. The tantalum oxide film is annealed in an oxygenated atmosphere after it is formed, so the nitride film is provided to prevent oxidation of the polysilicon lower electrode during that annealing.
When such a tantalum oxide film is to be formed for a device that has even higher levels of density and integration, extremely highly accurate control over the film thickness is required, as described above. At the same time, the uniformity of the film thickness within each surface is also required to be maintained even higher. The construction of the wafer boat has a large effect on this uniformity of the film thickness under batch processing conditions.
A wafer boat that is generally known in the art is shown by way of example in FIGS. 11 to 13. In the prior-art wafer boat shown in these figures, annular holder plates are fixed to the upper and lower ends of a number of support columns 2, such as three such columns, made of quartz and a large number of wafer support grooves 6 are formed at a predetermined pitch along the inner sides of the support columns 2, in the longitudinal direction thereof. Wafers W are mounted on and held by the wafer support grooves 6, the entire wafer boat is inserted in this state into a vertical thermal processing furnace, and a predetermined thermal processing is performed.
A wafer boat of the configuration shown in FIGS. 14 and 15 has also been proposed. This wafer boat has a structure that differs from that of the above described wafer boat where the wafers W are supported directly by the support columns 2, in that quartz mounting stands 8 are supported by groove portions 12 of the three support columns 2, and a large number of these annular mounting stands 8 are provided at a predetermined pitch. Gas flow apertures 10 of approximately the same size as the wafers W are provided in the mounting stands 8, and the mounting stands 8 themselves are formed to be annular.
A plurality of hook-shaped support protrusions 14, such as three support protrusions 14, is provided on an inner peripheral edge of the upper surface of each of the mounting stands 8 in such a manner as to extend slightly inward in the radial direction, and the wafers W are supported thereon with the lower peripheral edges thereof in contact with these hook-shaped support protrusions 14.
This prior-art wafer boat construction causes no problems if the requirements for the levels of integration and density are not too high, as in the prior art. However, if control over the film thickness in nanometer units is required, as it is with current demands for even higher levels of integration and density, this construction becomes insufficient.
For example, the processing temperature is generally set to a high temperature region in which gaseous-phase reactions occur, such as approximately 350 to 480.degree. C. for the formation of a tantalum oxide film or approximately 600 to 650.degree. C. for the formation of a polysilicon film, because the resultant film-formation speed is so high. However, with such gaseous-phase reactions, there is a tendency for the thickness of the thus-formed film to increase slightly from the central portion of each wafer towards the peripheral portion thereof. For that reason, the processing temperature is set to a level that is less than each of the above temperature ranges, so that there are no gaseous-phase reactions and the gases cause a film to adhere on the wafer surface by surface reactions, to satisfy the demand for uniformity of film thickness within each wafer surface.
However, a problem arises during such surface reactions in that the amount of film formed on the upper surface of the wafer which is being subjected to the film-formation process is affected by the type of film or the state of the lower surface of the wafer positioned immediately thereabove, so that it becomes difficult to maintain high levels of uniformity of film thickness within each surface and between different surfaces.
In general, as shown in FIG. 11, a plurality of dummy wafers W1 are always placed at each of the upper and lower ends of the wafer boat, and one monitor wafer W2 for monitoring factors such as the film thickness during the film formation is disposed on the inner side (towards the center of the wafer boat) of each of these groups of dummy wafers W1. A large number of product wafers W are disposed between these monitor wafers W2.
In such a case, since the dummy wafers W1 are always in position during a plurality of repetitions of the film-formation process, the same type of film forms on the upper and lower surfaces thereof. In contrast, a bare wafer is used as each monitor wafer W2, so a state occurs in which a natural oxide film (SiO.sub.2) forms irregularly on the monocrystalline silicon of the lower surface thereof. In addition, it does not always happen that all of the product wafers W accommodated in the wafer boat have experienced the same processing steps; it could happen that wafers W that have experienced different processing steps are accommodated in the wafer boat. In such a case, various different film types could form on the lower surfaces of the wafers W. In addition, if nitriding by RTN processing is performed on the polysilicon of the lower electrode as preprocessing before the formation of a tantalum oxide film, for example, it could happen that an insufficiency of the nitriding gases could leave the polysilicon exposed at the central portion of the lower surface of the wafer, so that only the edges thereof are nitrided.
Thus, when films are formed by surface reactions, the film formation on the upper surface of each wafer is affected by the state of the lower surface of the wafer positioned immediately thereabove, making it extremely difficult to obtain a high level of accuracy in the uniformity of the film thickness between surfaces and within each surface.